Team Contact info:
Cody Haxby -
Vince Rodriguez -
James Kain -
Robert Flynn -
Faculty Mentor:
Dr. Bertrand Cambou -
John Callahan -

Cody Haxby

Vince Rodriguez

James Kain

Robert Flynn

Project Problems
Final Design
Team Gallery
Prototyping and Documentation

Project Description

What motivated the need for this capstone is the research and development of cryptographic methodology which has been created by Dr. Cambou of NAU. This capstone project helps to further the research which helps to prove the methodology outlined in his studies. We are working in conjunction with BRIDG, a semiconductor manufacturing company based in Florida, to test the resistances of particular cells on the wafers they create to ensure that Dr. Cambou's theories are proving to be correct and feasible. For this project, the team is utilizing an SMU to pass a voltage and current through a specific intersection of the labeled tiles. This allows for us to read the resistance of the individual cells, and save it if it is within an acceptable range for cryptographic purposes. The proper range of resistances for our cryptographic needs is anywhere from 1 Mega-Ohm to about 5 Mega-Ohms. Otherwise the cells are generally shorted, open, or will break with higher current levels which is unacceptable for our needs.

How it works

1. Plug in vacuum to ensure silicon wafer can not move while testing
2. Place silicon wafer on metal chuck and turn on suction to keep wafer in place
3. Place metallic probes on the first pad on the left and top side of the tile (A-J) to test, starting from [1,1]
4. Use SMU to test particular intersections using currents from 100nA to 800nA and hopefully obtain a resistance value
5. Save readings which have resistance value and are not shorted or open
6. Compile readings and analyze using excel spreadsheet to see where the good/bad spots on the wafers are